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Revista CD Expert 8
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Revista CD Expert nº 08 CD1.iso
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1994-10-11
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4KB
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141 lines
---- iAPX Revision History ----
--- version 1.22, 941011
- read the dox one more time
- some more CPI Id/Rev's
--- version 1.21c, 930913
- added some CPU ID/Revs from 386id.asm source
- added BIOS call to get ID/Rev
- changed the version numbering ;-)
--- version 1.21.b2, 930401
- added again IIT detection only for CPU < 486
- added cyrix 486slc/dlc test
--- version 1.21.b1, 930312
- only those tests are displayed, which failed.
- added test for the STOS32 bug
- added support for the HyperDisk API (from version 4.50 on); staged
writes will be disabled and afterwards re-enabled to gain some
fault tolerance
- added test for BSWAP error (486)
- added test for CMPXCHG error (486)
- added invalid opcode fault handler
- re-added the "old" 32-bit mul bug test
- added 386 registers to register dump
- added timings for 486sx
--- version 1.20.g5, 920822
- fixed a bug in register dump
- fixed a bug when no timer was found; system found run in an overflow
- fixed a bug that caused iAPX to think the timer chip wasn't there/ok
on certain chipsets. iAPX should now run on some SIEMENS/Vobis (?)
machines.
- added windows 3 detection (only to display a warning message)
- removed 'beta test' stamp (hopefully not too fast)
--- version 1.20.g4, 920322
- added detailed debug output in case of error/interrupt
- modified COPYING
--- version 1.20.g3, 920226
- added/corrected some timings
--- version 1.20.g2, 920226
- added some 486 sx/dx revision id's
--- version 1.20.g1, 920207
- changed a20 handling with extracts of himem.asm 2.06
- corrected stupid bug in reset routine
- added a20 handling for ps/2 and hp vectra machines (himem.asm)
--- version 1.20.bF, 920207
- removed IIT detection; it caused probs on 486 based systems
- corrected some bugs in 486 mode
- added 486 flag encryption
- removed TS bit display
- removed ET bit display in 286 mode
- nicened up reset routine
--- version 1.20.bE, 920205
- added IIT detection (not tested yet; anyone out there who has one?)
- completed work on step detection. should run pretty fine ...
- corrected detection and re-init of a20 gate after reset (using "r")
--- version 1.20.bD, 920203
- added reset and decoding of ID/Rev data (steps)
- added P, R and ? parameter
- added help screen
--- version 1.20.bC, 920201
- added another timer chip test
- fixed some problems with 'VOBIS' computers
- detection of NPX emulation
--- version 1.20.bB, 911220
- changed some internal stuff; added new flags and deleted VM and
PG bit display in 386 mode;
- slight cosmetical changes
- enhanced .DOC file
--- version 1.20.bA, 911214
- invented a new watchdog to check for occurences of int00 (overflow)
interrupts, though they need to be handled special.
- corrected 80286 clock rate timings
--- earlier versions
many. very many. it would be too much work to type the history of
all ever assembled versions in this file. it's useless, too, cause
these version didn't left my binary cave ...
--- not implemeted yet
- cache memory detection
- tlb testing
- 1st level cache testing (486)
- indirect 386 step detection (b0, b1, d0)
- detection of cyrix and weitek npx
- detection of 386 SL
- bus frequency testing
- better iit detection
- fix bug on some dx-40 machines
- make it run on ps/2 models
- detect /2 machines
- detect bus type